This invention relates in general to computers and in particular, to the management of the computer's memory.
Virtually all computers today utilize what is known as virtual memory to provide more memory than physically available. A virtual address space is a set of memory addresses available for a program to use. Typically, the virtual address space is divided into blocks of equal size called pages. These blocks must be converted or mapped into the computer's physical memory. The mapping is performed using a translation buffer.
The translation buffer compares current virtual page address of a current instruction with previously translated instructions. If a match is found, that entry in the translation buffer is selected and its associated physical page address is provided. To improve throughput, the entries in the translation buffer are compared in parallel.
It is essential that the translation buffer does not contain multiple copies of identical virtual pages addresses. This can cause multiple entries to be selected, which may result in currents shorts that can cause damage to the computer.
To prevent conflicting entries, some systems implement an analog circuit that disables the translation buffer if several entries are simultaneously selected. However, the number of conflicting entries needed to trigger shutdown is imprecise, depending on circuit variations. Further, shutting down and resetting the translation buffer causes delay in the computer.
Thus, there is a need for providing a translation buffer that can detect multiple entries accurately as well as resolving discrepancies without hindering performance.